A semiconductor memory device is provided with a memory cell that stores data and a peripheral circuit that controls operations of data writing, reading, erasing and the like with respect to the memory cell. For example, an NAND-type flash memory has a charge accumulating layer which accumulates a charge as a memory cell and a cell transistor. In the memory cell region, a plurality of memory cells are arranged in a matrix state, the memory cell to be operated is selected by the peripheral circuit arranged in the periphery of the memory cell region so that the operations such as data writing, reading, erasing and the like are performed.
Here, a relatively high voltage is applied to a transfer transistor in the peripheral circuit in order to drive the memory cells. Therefore, the size of the transfer transistor is larger than that of the cell transistor. In the semiconductor memory device including with the above peripheral circuit, further size reduction is in demand.